Browsing by Author "Poothamkurissi Swaminathan, Subramanian"
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Timing Aware Partitioning for Multi-FPGA based Logic Simulation using Top-down Selective Flattening Poothamkurissi Swaminathan, Subramanian (2012-10-19)In order to accelerate logic simulation, it is highly beneficial to simulate the circuit design on FPGA hardware. However, limited hardware resources on FPGAs prevent large designs from being implemented on a single FPGA. ...